This invention relates to integrated circuit layout design.
Ever since the appearance of the first integrated circuit, artisans have been trying to fit as much circuitry as possible on each integrated circuit. In today's typical layout designs, an integrated circuit contains a central core of functional circuits that is surrounded by an input/output ("I/O") ring of layered semiconductor strips designed to carry signals or power into and out of the integrated circuit. Most of the I/O strips contain circuitry associated with the signals carried through connection pads to and from the processing circuits at the core. A few I/O strips are dedicated to carrying power. See U.S. Pat. No. 3,968,478 issued on Jul. 6, 1976 for an example of such a layout design. As an aside, in order to reduce design time, most designers have developed circuit packages, or circuit cells, that perform a given function, and each individual design is created by selecting, at least for part of the design, from the pre-designed circuit cells. It is such circuit cells that are often found in the core area of the integrated circuit and, particularly, in the I/O strips. In this document, the terms "circuits" and "circuit cells" are used interchangeably because, in the context of this disclosure, it is unimportant whether a previously designed circuit is used, or a specially designed circuit is used.
The distinction between signal-carrying I/O strips and power-carrying I/O strips is that the former do not carry power, and the latter do not contain signal-carrying circuitry, or circuit cells. Although, some embodiments do have power I/O strips which contain circuitry related to the provision of power. Examples of the latter are circuits designed to protect the power bus, or a MOS device of a resistive nature designed to quiet noise on the bus. In any event, the power strip is left with much available space.
Of course, there is no requirement that an integrated circuit layout comprise a core area surrounded by a ring of I/O strips, but it has been found that the use of cells and particularly the use of cell with such a layout arrangement is extremely beneficial to fast and effective design of integrated circuits. While by discarding the core area--I/O ring schema may result in a layout that conserves some space, the incredibly greater amount of time that is required to achieve a layout design is often not cost effective.